Spice Tutorial: Creating netlist from gschem

This assumes some familiarity with gschem, the gEDA Schematic Editor. The goal here is to generate a netlist for a circuit containing an opamp.

A file named opamp_spice.sub (shown below) is used as a subcircuit (.SUBCKT) to model the opamp. In the file the name of the model is given as opamp in the .subckt line.

  1. In gschem, add the opamp symbol "aop-spice-1.sym" from "SPICE simulation elements".

  2. Set its attributes:

  3. Add "spice-model-1.sym" from "SPICE simulation elements".

  4. Set its attributes:

  5. Add other components to finish the circuit. Save the schematic.

  6. In a terminal window, navigate to the directory containing your schematic and the file opamp_spice.sub.

  7. Type the command: gnetlist -g spice-sdb filename.sch. This should produce a netlist file named output.net.

Here are two opamp subcircuit files that can be used for opamp_spice.sub.

*
* OPAMP MACRO MODEL (INTERMEDIATE LEVEL)
*
*                IN+ IN- OUT  VCC  VEE
*.SUBCKT OPAMP    1   2   81   101   102 
* Change order to match spice opamp pins 1-5   
*                IN+ IN- VCC   VEE  OUT
.SUBCKT OPAMP    1   2   101   102  81 
Q1	5 1	7	NPN
Q2	6 2	8	NPN
RC1	101	5	95.49
RC2	101	6	95.49
RE1	7	4	43.79
RE2	8	4	43.79
I1	4	102	0.001
*
* OPEN-LOOP GAIN, FIRST POLE AND SLEW RATE
G1	100 10	6 5 0.0104719
RP1	10	100	9.549MEG
CP1	10	100	0.0016667UF
*
*OUTPUT STAGE
EOUT	80 100	10 100	1
RO	80	81	100
*
* INTERNAL REFERENCE
RREF1	101	103	100K
RREF2	103	102	100K
EREF	100 0	103 0 1
R100	100	0	1MEG
*
.model NPN  NPN(BF=50000)
*
.ENDS


* OP AMP MODEL - VLIMIT SERVO ******************
* Device Pins	   In+ In- V+  V-  Vout
.SUBCKT OPAMP      1   2   101 102  82
*  (Note: correct pin order for aop-spice-1.sym)

* INPUT R
RIN	1	2	1e+012

* INPUT STAGE: GAIN, POLE
G1	100	10	1 2	1
R1	10	100	1e+006
C1	10	100	3.3e-008

* OUTPUT VOLTAGE LIMITS
VVLP	101	90	DC	1.5V
DVLP	10	91	DNOM
EVLP	91 100	90 10	1000
VVLN	92	102	DC	1.5V
DVLN	93	10	DNOM
EVLN	93 100	92 10	1000

* OUTPUT STAGE
EOUT	80 100	10 100	1
ROUT	80	82	100

* INTERNAL REFERENCE
RREF1	101	103	100K
RREF2	103	102	100K
EREF	100 0	103 0 1
R100	100	0	1MEG

.MODEL DNOM D
.ENDS